Publications

  • Joan Daemen, Pedro Maat C. Massolino, Alireza Mehrdad, and Yann Rotella. "The Subterranean 2.0 Cipher Suite". IACR Transactions on Symmetric Cryptology, 2020(S1), 262-294. doi:10.13154/tosc.v2020.iS1.262-294. [Paper] [Code] [BIB]
  • Thierry Simon, Lejla Batina, Joan Daemen, Vincent Grosso, Pedro Maat C. Massolino, Kostas Papagiannopoulos, Francesco Regazzoni, and Niels Samwel."Friet: An Authenticated Encryption Scheme with Built-in Fault Detection". Advances in Cryptology – EUROCRYPT 2020. EUROCRYPT 2020. Lecture Notes in Computer Science, vol 12105. Springer, 2020. doi:10.1007/978-3-030-45721-1_21. [Paper] [Code] [BIB]
  • Pedro Maat C. Massolino, Patrick Longa, Joost Renes, and Lejla Batina. "A Compact and Scalable Hardware/Software Co-design of SIKE." IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(2):245–271, Mar. 2020. doi:10.13154/tches.v2020.i2.245-271. [Paper] [Code] [BIB]
  • Daniel J. Bernstein, Stefan Kölbl, Stefan Lucks, Pedro Maat C. Massolino, Florian Mendel, Kashif Nawaz, Tobias Schneider, Peter Schwabe, François-Xavier Standaert, Yosuke Todo, Benoît Viguier. "Gimli: a cross-platform permutation". Cryptographic Hardware and Embedded Systems – CHES 2017. CHES 2017. Lecture Notes in Computer Science, vol 10529. Springer, Cham. doi:10.1007/978-3-319-66787-4_15. [Paper] [BIB]
  • Pedro Maat C. Massolino, Lejla Batina, Ricardo Chaves, Nele Mentens. "Area-optimized montgomery multiplication on IGLOO 2 FPGAs". Field Programmable Logic and Applications (FPL), 2017 27th International Conference on. 2017. doi:10.23919/FPL.2017.8056762. [BIB]
  • Łukasz Chmielewski, Pedro Maat C. Massolino, Jo Vliegen, Lejla Batina, Nele Mentens. "Completing the Complete ECC Formulae with Countermeasures". Journal of Low Power Electronics and Applications. vol 7. pp 13. doi:10.3390/jlpea7010003. [Paper] [BIB]
  • Pedro Maat C. Massolino, Barış Ege, Lejla Batina. "Smart Card Fault Injections with High Temperatures". 6th Conference on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2016). 2016. [Paper] [BIB]
  • Pedro Maat C. Massolino, Joost Renes, Lejla Batina. "Implementing Complete Formulas on Weierstrass Curves in Hardware". Security, Privacy, and Applied Cryptography Engineering. SPACE 2016. Lecture Notes in Computer Science, vol 10076. Springer, Cham. doi:10.1007/978-3-319-49445-6_5. [Paper] [Code] [BIB]
  • Pedro Maat C. Massolino, Lejla Batina, Ricardo Chaves, Nele Mentens. "Low Power Montgomery Modular Multiplication on Reconfigurable Systems" IACR Cryptology ePrint Archive, 2016. [Paper] [BIB]
  • Pedro Maat C. Massolino, Paulo S. L. M. Barreto, Wilson V. Ruggiero. "Optimized and Scalable Co-Processor for McEliece with Binary Goppa Codes". ACM Transactions on Embedded Computing Systems (TECS). vol 14. issue 3. pp 45. 2015. doi:10.1145/2736284. [Code] [BIB]
  • Pedro Maat C. Massolino, Cintia Borges Margi, Paulo S. L. M. Barreto, Wilson V. Ruggiero. "Scalable hardware implementation for quasi-dyadic Goppa encoder". Circuits and Systems (LASCAS), 2014 IEEE 5th Latin American Symposium on. pp 1-4. IEEE. 2014. doi:10.1109/LASCAS.2014.6820285. [BIB]
  • L. H. Oliveira, L. Y. Cheng, O. M. Gonçalves, Pedro Maat C. Massolino. "Modelling of water demand in building supply systems using fuzzy logic". Building Services Engineering Research and Technology. vol 34. issue 2. pp 145-163. 2013. doi:10.1177/0143624411429381. [Paper] [BIB]
  • Laio B. Vilas Boas, Pedro Maat C. Massolino, Rafael T. Possignolo, Cintia B. Margi, Regina M. Silveira. "Performance evaluation of QoS in wireless networks using IEEE 802.11e". XXX Simpósio Brasileiro de Telecomunicações SBrT'12. 2012. [Paper] [BIB]
  • L. H. Oliveira, L. Y. Cheng, O. M. Gonçalves, Pedro Maat C. Massolino. "Simulation model of design flow rate in water submetering systems using fuzzy logic and Monte Carlo method". CIB W062 36th International Symposium. pp 14-29. 2010. [Paper] [BIB]

Master thesis

  • Pedro Maat C. Massolino. "Design and evaluation of a post-quantum cryptographic co-processor". University of Sao Paulo. 2014. [Thesis] [Code] [BIB]
The thesis shows a hardware design that can perform McEliece encryption with binary QD-Goppa codes and McEliece decryption with binary (QD-)Goppa codes. The entire design was written and tested in VHDL.